1. Field of the Invention
The present invention relates to an exposure apparatus employed in a semiconductor manufacturing process and to an exposure method using the same. More particularly, the present invention relates to a method of and apparatus for exposing selected portions of a photoresist film using a reticle to form a photoresist pattern.
2. Description of the Related Art
Recently, semiconductor devices have been rapidly improved to advance the development of information processing devices such as computers. Semiconductor devices must, therefore, perform at high speeds and possess a large storage capacity. To this end, current semiconductor manufacturing processes are aimed at improving the integration, the reliability and the response speed of semiconductor devices. Hence, advances in the art are concentrating on micro-processing techniques, such as photolithography, to meet this demand for highly integrated semiconductor devices.
As is well known in the art, photolithography is a process in which a semiconductor substrate is coated with an organic photoresist to form a photoresist film on the substrate, and the image of a reticle is transferred to the photoresist film by directing ultraviolet light through the reticle and onto the photoresist film. More specifically, the photoresist film is composed of an organic material whose solubility relative to an alkaline solution changes when exposed to light such as ultraviolet rays or X-rays. The reticle bears a pattern and is positioned over the substrate, and the light is selectively applied to the photoresist film using the pattern of the reticle as mask to thereby selectively expose a predetermined portion of the photoresist film. Then, the photoresist film is developed using a developing solution. Whereas that portion of the photoresist film having high solubility to the developing solution is removed, the portion of the photoresist film having a low solubility remains (for example, the exposed portion of the photoresist film in case of a positive-typed photoresist film). As a result, a photoresist pattern is formed on the semiconductor substrate. The photoresist pattern is, in turn, used to pattern another layer, such as a metal layer, on the semiconductor device to produce a wiring pattern, for example, of the semiconductor device.
Examples of exposure apparatus for performing such an exposure process are disclosed in U.S. Pat. No. 5,706,076 (issued to Minoru Takeda), U.S. Pat. No. 5,781,277 (issued to Kazunori Iwamoto), U.S. Pat. No. 5,526,093 (issued to Kazuhiro Takahachi), and U.S. Pat. No. 5,842,824 (issued to Kenji Nishi) etc.
FIG. 1 shows part of a conventional exposure apparatus. Referring to FIG. 1, the conventional exposure apparatus has a stage 12 for supporting a semiconductor substrate W, a lens 14, a reticle stage 16 for supporting a reticle 18, and a light source (not shown). The reticle stage 16 is precisely aligned with the stage 12 and hence, with the semiconductor substrate W. Light generated by the light source passes through a beam concentrator (not shown), whereby the rays of light are made parallel. The light is then directed through the reticle 18. The reticle 18 bears an image, which is incident on the lens 14. The image of the incident light is projected by the lens 14 on a reduced scale onto the photoresist film on the semiconductor W. Accordingly, the light exposes a predetermined portion of the photoresist film on the semiconductor substrate W.
In general, the alignment margins of the exposure process become smaller and the steps on semiconductor substrates becomes greater as semiconductor devices become more highly integrated and the semiconductor substrates from which the devices are made become larger. If the step between a region A and a region B of the semiconductor substrate is large in accordance with this trend, e.g., is at least approximately 0.5 μm, it becomes impossible to secure the focus margin required for forming a pattern having the desired critical dimension (CD). Hence, the semiconductor substrate may be polished to reduce the step on the semiconductor substrate. Alternatively, to overcome the limitations imposed by a large step on the semiconductor substrate in attaining the necessary focus margin, a first reticle and a second reticle may be used to respectively expose the photoresist film at regions A and B of the semiconductor substrate.
FIG. 2 is a flow chart illustrating such a method for forming a pattern on a semiconductor substrate using a conventional exposure apparatus. In particular, the method shown in FIG. 2 is used to form a wiring pattern on a semiconductor substrate, having a large step between a region ‘A’ and a region ‘B’ thereof. Thus, the photoresist pattern is formed using a first reticle and a second reticle, respectively.
Referring now to FIG. 2, the first reticle bearing a pattern ‘A’ is aligned with and loaded on a reticle stage (step S10).
Light is directed through the first reticle and a projection-reduction lens onto region A of the semiconductor substrate, whereby that portion of the photoresist film in region A is exposed and hence, reacts with the light (step S20). Then, the portion of the photoresist film that has reacted with the light is removed using a developing solution to produce a first photoresist pattern in region A of the semiconductor substrate (S30).
An overlay of the first photoresist pattern is measured (step S40), and then optimal conditions of the exposure time and the focus margin relative to the first photoresist pattern are measured using a scanning electron microscope (SEM) (step S50).
The semiconductor substrate is then checked to confirm the integrity of the photoresist pattern and to determine the level of particles present on the first photoresist pattern (step S60). If these conditions are satisfactory, a layer(s) on the semiconductor substrate is patterned using the first photoresist pattern as an etching mask (step S70).
After the first photoresist pattern is removed (step S80), the semiconductor substrate is cleaned in order to remove particles from the semiconductor substrate and in particular, from the patterned layer(s) now formed thereon (step S90).
Subsequently, desired patterns are formed on region B of the semiconductor substrate with a second reticle using a sequence of steps (steps S100, S110, S120, S130, S140, S150, S160, S170 and S180) similar to those described above.
Thus, as described above, when the step between region A and region B of the semiconductor substrate is at least approximately 0.5 μm, a photoresist pattern can be formed on the semiconductor substrate by performing photolithography processes at regions A and B of the substrate using first and the second reticles having different patterns. However, this technique adds to the cost of the semiconductor device manufacturing process while limiting the productivity of the manufacturing process because the photolithography and etching processes must be performed twice to form one wiring pattern at the stepped portion of the semiconductor substrate.
FIG. 3 is a plan view of the conventional reticle and the shots on the semiconductor substrate exposed using the reticle according to another aspect of the photolithography process. Referring to FIG. 3, the exposure process should be executed adjacent the outer peripheral edge portion of the semiconductor substrate W using only part of the overall pattern to prevent the edge portion of the semiconductor substrate W from being damaged during an exposure process. Thus, the exposure process in this respect requires at least two patterns: a whole pattern and a partial pattern. To this end, a reticle 18 defines first and second patterns 19a and 19b thereon. In this exposure process, a shot is taken using the first pattern 19a to form a main pattern at reference region 20a of a photoresist film formed on the inner portion of the semiconductor substrate W. Then a shot is taken using the second pattern 19b to form the partial pattern at region 20b of a photoresist film formed at the outer peripheral edge portion of the semiconductor substrate W.
However, the exposure process performed using the reticle 18 having the first and second patterns 19a and 19b limits the throughput of the semiconductor manufacturing process because the sizes of the patterns that can be borne by the single reticle 18 are, in turn, limited. In addition, even in a case in which exposure processes are carried out in succession using two reticles having different patterns, the throughput remains limited and the possibility of the mis-alignment of the reticles remains strong as the process requires the exchange of the reticles on a single reticle stage.